Team:BostonU/Encoder
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- | <th scope="col"> | + | <th scope="col">We are testing and refining the Chimera workflow by using it to build a test genetic regulatory network called a priority encoder. This logic device is based on a NOR-gate architecture and compresses three binary inputs into 2 outputs. The priority encoder allocates a priority to each of its inputs, as seen in the truth table below where the circuit prioritizes input 3, followed by inputs 2 and 1 in descending order. For example, if input 3 is active, the binary output will be 11 regardless of the values of inputs 2 and 1. This encoder design was selected from a case study by Ernst Oberortner <i>et. Al.</i> for showing the versatility of the Eugene language.<br><br><img src="https://static.igem.org/mediawiki/2014/9/97/Case-study-logical-circuit_BU14.png" width="100%"><br><center><caption>The NOR-gate based combinatorial logical priority encoder. From Oberortner <i>et. Al</i> 2014.</center></caption> |
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Revision as of 20:08, 11 October 2014
We are testing and refining the Chimera workflow by using it to build a test genetic regulatory network called a priority encoder. This logic device is based on a NOR-gate architecture and compresses three binary inputs into 2 outputs. The priority encoder allocates a priority to each of its inputs, as seen in the truth table below where the circuit prioritizes input 3, followed by inputs 2 and 1 in descending order. For example, if input 3 is active, the binary output will be 11 regardless of the values of inputs 2 and 1. This encoder design was selected from a case study by Ernst Oberortner et. Al. for showing the versatility of the Eugene language. |
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