Team:UC Davis/Potentiostat Design Inspiration Iteration
From 2014.igem.org
Inspiration & Iteration
Inspiration & Iteration
Software
Software & Downloads
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Getting Started
All files in compressed ZIP folders
All Boards and Schematics:
Version 2.0: BRD, SCH, CAM
Version 1.0: SVG, DXF
Version 1.1: BRD, SCH
Version 1.2: BRD, SCH
Version 1.3: BRD, SCH
Version 1.4: BRD, SCH
Inspiration
The CheapStat is a budget friendly device developed at UC Santa Barbara several years ago. We aspired to build this circuit and modify the software for our purposes, however, the microcontroller on the CheapStat was controlled predominantly in machine level code. The learning curve seemed unreasonable considering our deadline, so we had to find another solution.
We were ultimately forced to build our own. With a clean slate, we wanted to create a device that would fulfill our needs, but also be welcomed by the iGEM community. We aimed to match the performance of the CheapStat, but also improve in three ways: increase the effective range of the instrument, decrease the cost of the circuit, and convert to an arduino-friendly microcontroller. In this capacity, we have succeeded.
We modeled the potentiostat circuit in TINAspice to better understand the limitations of our opAmp selection. We also designed an abstract to better visualize our circuit design.
Abstract
Breadboard
Development began on the protoboard. Circuit designs were prepared using the CheapStat as a reference. SMD-ICs were soldered to DIP adapters and the potentiostat was wired for the first time. The protoboard became the primary device with which to develop the software. The protoboard was not designed with a switch to control current ranges, it did include noise however. Fast Fourier transform of the recorded signal showed that the largest component was from the 60 Hz range. Extensive testing showed that the noise was related to the protoboard itself as the signal persisted long after the components were removed. There was no other option but to continue the development by creating a circuit board.
Version 1.0
Our first circuit board was designed and drawn entirely by hand. The traces and pads were created as an SVG file. After several file type exchanges, the file became a DXF and was loaded into software for precision CNC milling. The board was milled using the LPKF Circuit Pro milling machine in the TEAM prototyping lab on campus. The board was populated and tested using the traditional potentiostat test: reference and counter shorted, resistor connecting working electrode lead and ref/counter lead.
The signal was convolved with 60Hz noise. Our immediate thought was to digitally filter the signal, but ultimately we had an analog problem. We suspected the lack of a ground plane in our hand drawn circuit was the likely culprit in what seemed to be a ground loop. We switched our approach from hand drawing our circuits to using Eagle. .
Version 1.1
Over a very long weekend, we learned how to build a schematic and board file in Eagle. A ground plane was built into the circuit to resolve issues related to ground loops. The board design was sent to Seeed Studios, Inc for cheap PCB manufacturing. There services cost only about $4 per board, and allowed us to significantly reduce the cost of the circuit. When testing the circuit, the results were far noisier than the original protoboard. The wiring on the board was a mess though. New rule: wire the components by hand. The auto-routing feature in Eagle was not made with instrumentation in mind. We needed to rewire things. All the components at this point were getting power straight from the USB. We considered finding an op-amp with a higher power supply reject ratio (PSSR), but the problem was the power source, not the op-amp. We wrote software to provide digital filtering for a quick fix. Then we redesigned the circuit.
Version 1.2
Our next iteration fixed some of the power supply issues. We switch from our ICs receiving powering by USB, to routing the USB power through a linear dropout voltage regulator (LDO), then to the ICs. The solution was short lived, however, as it reduced the noise, but not completely. The next obvious issue was the analog and digital ground setup. All the ICs are being grounded on the analog ground pin. This also happens to be the pin that the main analog reference is grounded to, causing noise from the digital circuitry to bleed into our analog signal.
Version 1.4
The board and schematic for version 1.3 were designed, but never sent the PCB manufacturer. Before production we decided on more drastic changes. Our next iteration produced two major changes: we added a single channel op-amp with a PSSR of 140 dB for our main analog reading through the working electrode. We isolated this op-amp as the only IC connected to the analog ground pin. We then re-wired all the other ground pins to the digital ground, or GND. The results were rewarding, the circuit was finally starting to produce results with a low enough signal to noise ratio to actually use the numbers! Combined with the digital filter our circuit was performing great, but we had already designed the next iteration!
Version 2.0
The final iteration made a significant change to the gain switch. The SP4T we designed originally was inline with the gain resistor of our transimpedance amplifier. The IC is a TS3A5017 Dual SP4T switch, where we had one of the SP4T's grounded. We found a method of rewiring the switch into the output of the transimpedance amplifier. This prevented the op-Amp from amplifying the leakage current inherent to the switch. The stray capacitance added by this method also helped to compensate the amplifier in the range required by the high gain resistors.